The use of oxides in electronics and optoelectronics is well known, namely their applications as a passive element, as a transparent conductive electrode [1], or just as an anti-reflecting layer in different optoelectronic or optical devices [2], including their deposition at room temperature [3,4]. However, their application as an active semiconductor material is due to the initial work by H. Hosono [5], thereafter being confirmed in the production of devices, namely thin film transistors, at low or high temperatures [6,7,8] and their transport properties have been explored, namely concerning amorphous oxides [9]. Moreover, the use of active semiconductor oxides has been witnessed in the production of heterojunctions, namely in light emitting diodes [10], and other electroluminescent applications [11], with the use of p-type oxides for applications in active matrices or for producing CMOs-type devices or other type of logical devices, actuated at high or low voltage, being less well known. There are a few works, however, related to the use of OCu2 produced at high temperature (above 500° C. and always polycrystalline), as channel region in TFT [12], quite distinct from the structure presented in the present invention. Published recent works are also known concerning p-type channel TFT based on SnO also produced at high temperatures (above 500° C. and always polycrystalline) [13], totally different from the system now proposed.
The use of compounds of the (OCu—Cu1-2) and [(OSnz+(Sn1-2)w types, in their different electronic configurations, is known for applications such as electrical conductors, usually in the form of binary oxides, as referred to in the patent request US2006152138, whose application domain does not include the objects of invention of the present request.
The same happens with the patent application WO2005081055, that relates to the fabrication of stacked double layers of transparent conductive oxides (TCO) based on alumina-doped zinc oxide (AZO) or gallium-doped zinc oxide (GZO) or both (AGZO), or even a coating of indium and tin oxide (ITO), to be used in LCD or OLED flat panel displays or plasma displays, also including solar cells or other electronic devices, such as conductive electrodes, completely apart from the object of the present invention.
The patent JP2003324206 relates to the production of p-n junctions for photovoltaic applications wherein the p-type oxide is based on Copper-Aluminium, Copper-Gallium, Copper-Indium, and Copper-Strontium alloys, and the n-type oxide is selected from the tin, Indium, Titanium, and Zinc oxides or Gallium Nitride, which materials and compounds or alloys are totally different from the objects of creation of the present invention, in terms of materials and their applications, which focus on TFT or CMOS-type active devices and derivations thereof.
The patent US2002028571 refers to new zinc oxide alloys incorporating hydrogen and gallium, obtained by co-pulverization and processed at low temperatures, intended for transparent conducting electronic applications, thereby not involving either of the objects of creation and use of the present invention.
The patent JP2000045063 refers to the formation of indium-based transparent conductive oxides containing tin, zinc, or gallium, with thicknesses between 50 nm and 500 nm, to be deposited onto polymer substrates, such as electrical contacts, which is not the object of the present invention.
The patent WO2004/038757 (J. Wager/Oregon State University) concerns the use of oxide materials, such as zinc oxide (ZnO), tin dioxide (SnO2), or indium oxide (In2O3) as an n-type active semiconductor in the fabrication of the TFT channel, not covering any of the objects claimed in the present invention.
The patent US2003/0218221A1 corresponds to the United States patent WO2004/038757 and is, therefore, completely different from the object of the present invention. The inventors of this patent claim the possibility of using additives for the ZnO and SnO2 films from the periodic table of elements, such as Al, In, Ga, Bi, B, La, Sc, Y, Lu, Er, Ho, the films being processed at temperatures in the range of 100 to 500 centigrade degrees.
The patent US2005/0017244A1 claims the use of n-type oxides based on zinc oxide and tin dioxide, either doped or not, for producing the TFT channel region, the process temperature not being mentioned. Neither of these claims collides with the objects of the present invention.
The patent US2005/0199959 A1 (J. Wager and Oregon State University, OSU) refers to the use of n-type zinc and indium oxides and their alloys as active semiconductor in the production of electronic devices, including the production of the TFT channel region, completely different from the objects of the present invention.
The patent US2006/0079034 A1 (J. Wager and OSU) refers to the passivation of electronic circuits using SiOx, SiNx, SiOxNy, GeOxTaOx, SiOxCy, YOx, Mgx, and other materials, outside the object of the present invention.
The patent WO2005/088726 A1, (H. Osono) refers to the production of TFTs based on n-type amorphous oxides with a free carrier concentration of 1018/cm3 or lower, this value being controlled through the oxygen partial pressure used during the fabrication process. The materials on which the oxides are based involve Ga—In—Zn; In—Ga—Zn1-x—Mgx, or Ga—Zn—Sn, using ceramic targets and process temperatures around 1000° C., using fabrication techniques such as pulsed laser deposition, PLD. In addition to the above mentioned oxides, the authors also claim the following compositions of metal oxides, either doped or not with impurities: InxGa1-x (0≦x≦1), InxZn1-x (0.2≦x≦1), InxSn1-x (0.8≦x≦1), Inx(Zn,Sn)1-x (0.15≦x≦1) or [(Sn1-xM4x)O2]a. [(In1-yM3y)2°3] b. [(Zn1-zM2z)O]c. [0≦x≦1, 0≦y≦1, 0≦z≦1, 0≦a≦1, 0≦b≦1, 0≦c≦1], being considered as impurities the following elements to be incorporated:    Pentavalent impurities M5: V, Nb, Ta.    Tetravalent impurities M4: Si, Ge, Zr;    Trivalent impurities M3: B, Al, Ga, Y;    Divalent impurities M2: Mg and Ca.
This patent partially relates to the same type of electronic devices, such as TFT, simply referring to n-type devices whose charge transport is controlled by electrons, thereby not considering p-type devices whose transport is controlled by holes.
The patent JP2006165527A, also by H. Osono, corresponds to an update of the previous patent, being also claimed the low temperature fabrication of these devices and thus, like the previous patent, it does not collide with the object of the present invention.
The pending patent PCT/PT2007/000008 concerns the use of p-type and n-type multicomponent oxides based on copper, nickel, and Gallium-Tin-Zinc-Copper-Titanium, not included in the object of the present invention.
In addition, several scientific papers concerning devices based on zinc oxide [7], zinc-doped indium oxide [8], tin-doped zinc [13], Gallium-Zinc-Indium-Oxygen multicomponent oxides [5,14] are known.
As far as patents related to p-type oxides are concerned, the majority refers to p-type oxides of zinc oxide, such as the cases of the patent applications or patents WO2009120024 and KR20090024767; the patent applications or patents KR20080086335 and US2008118769, related to the zinc oxide production method; the patent applications or patents CN1913174 and US2006233969, related to the patent application US2006233969, also concerning p-type zinc oxides and their possible combinations with semi-conductive compounds of the II-VI groups, not related to the objects of the present invention.
The pending patent CN101355031 refers to the method for the preparation of CuCrO2 p-type transparent oxides, not related to the objects of the present invention.
The pending patent CN101308109 refers to p-type delafossite based on Copper-Iron-Oxygen, either doped or not, for application in ozone sensors and fabrication methods involved, not included in the objects of the present invention.
The patent CN101260507 refers to the sintering process of ceramic targets of p-type semiconductors based on copper-doped nickel oxide, processed at very high temperatures, and the preparation method thereof, not included in the objects of the present invention.
The patent application or patent H01L27/02B2 refers to the fabrication of layers involved in the production and method for Metal-Oxide-Semiconductor Complementary devices in order to form, for example, the p-type metal oxide transistor, with the formation of active zones in the semi-conducting layer through the opening of appropriate windows where the base material, which is zinc oxide, is annealed, in order to render it p-type, the entire process being conducted at high temperatures, not related to the objects of the present invention in terms of methods, materials and process temperatures.
The pending patent KR20080064592 refers to the composition of p-type transparent oxides, quite dissimilar from the materials that are object of the present invention.
The pending patent CN201038163 refers to semiconductor tubes based on metal oxides for application in high voltage p-type grid devices, quite dissimilar from the objects of the present invention.
The pending patents EP1240941, JP03047966, JP405074653, JP06326104 refer to the catalytic preparation of p-type copper and aluminum semiconductor oxides, these materials being quite dissimilar form the ones that are object of the present invention.
The pending patent KR20070105002 refers to p-type metal oxides and fabrication methods thereof, not coincident with the methods and materials that are object of the present invention.
The pending patent CN2938408 refers to p-type metal oxides for applications in high voltage semi-conductive devices, not related to the objects of the present invention.
The pending patent KR20020028476 refers to the fabrication method of p-type semiconductor oxides which does not include the production methods of the non-stoichiometric monoxides of the present invention, both having in common the fact of using high dielectric constant dielectrics.
The pending patent KR20020002065 refers to the fabrication method of p-type oxide-based transistors, involving processes and materials dissimilar from the objects of the present invention.
The pending patent WO2006012444 refers to p-type metal oxide semiconductor field effect transistors (PMOSFET) in enhancement mode operation in which the active layer is the p-type semiconductor oxide, based on SRAM-type cells, while the patent G11C11/412 also refers to the same type of device, quite dissimilar from the objects of the present invention.
The pending patent US2005151164 refers to field effect transistors based on p-type metal oxides in enhancement mode operation whose structure includes a tensile strained thin layer (first thickness) disposed over the substrate between which another compressed layer is disposed (second thickness), whose thicknesses allow controlling the mobility and type of charge carriers, quite distant from the operating objects of the present invention.
The pending patent CN1487594 refers to semiconductor metal oxides in the form of p-type nanotubes or tubes for applications in high voltage devices, dissimilar from the objects of the present invention.
The pending patent US2003057495 and other related patents refer to copper-aluminum p-type semiconductor oxides, processed at high temperatures, for essentially passive applications, bearing nothing in common with the objects of the present invention.
The pending patent JP2001322814 refers to p-type oxides and fabrication method thereof not included in the materials and process conditions that are object of the present invention.
The pending patent TW428235 refers to the fabrication method of p-type oxides, dissimilar from the ones of the present invention.
The pending patent JP11162971 refers to the fabrication method and production of p-type oxides, not involving the materials that are object of the present invention.
Materials related to the present invention are the SnO oxides processed at high temperatures (around 575° C.) [1, 2], not including metal Sn embedded in their structure, with the consequence that the material cannot be processed at quite lower temperatures, in amorphous or polycrystalline structures, because the material is always polycrystalline in reference 13. On the other hand, the initial target can be a metallic, which is not the case in the previously cited reference.
The other known result closer to one of the objects of the present invention is the use of copper monoxide, processed at a temperature above 600° C., for the TFT channel layer [12] but not exhibiting the presence of any Cu metal cation, neither the room temperature processing of structures, presenting amorphous or polycrystalline structures. In addition, the use of NiO as p-type material in the production of p-n junctions is known [3], also processed at very high temperatures, but nothing is known about their use in bulk structures containing Sn and Ni alloys or metal elements as p-type channel in the fabrication of TFT.